diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ded8cfe..e04a2c6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -732,6 +732,15 @@
 	  ARMv8 Cortex-A57 processors targeting a broad range of networking
 	  applications.
 
+config TARGET_BCMNS3
+	bool "Support Broadcom NS3"
+	select ARM64
+	select BOARD_LATE_INIT
+	help
+	  Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
+	  ARMv8 Cortex-A72 processors targeting a broad range of networking
+	  applications.
+
 config ARCH_EXYNOS
 	bool "Samsung EXYNOS"
 	select DM
@@ -1916,6 +1925,7 @@
 source "board/broadcom/bcmcygnus/Kconfig"
 source "board/broadcom/bcmnsp/Kconfig"
 source "board/broadcom/bcmns2/Kconfig"
+source "board/broadcom/bcmns3/Kconfig"
 source "board/cavium/thunderx/Kconfig"
 source "board/cirrus/edb93xx/Kconfig"
 source "board/eets/pdu001/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index caa7756..153698a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -930,6 +930,8 @@
 dtb-$(CONFIG_ARCH_BCM6858) += \
 	bcm968580xref.dtb
 
+dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
+
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
new file mode 100644
index 0000000..54e5687
--- /dev/null
+++ b/arch/arm/dts/ns3-board.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier:      GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+/dts-v1/;
+
+#include "ns3.dtsi"
+
+/ {
+	model = "NS3 model";
+
+	aliases {
+		serial0 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
new file mode 100644
index 0000000..09098aa
--- /dev/null
+++ b/arch/arm/dts/ns3.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier:      GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+#include "skeleton64.dtsi"
+
+/ {
+	compatible = "brcm,ns3";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x0 0x80000000>,
+			<0x8 0x80000000 0x1 0x80000000>;
+	};
+
+	hsls {
+		compatible = "simple-bus";
+		dma-ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x68900000 0x17700000>;
+
+		uart1: uart@110000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x00110000 0x1000>;
+			reg-shift = <2>;
+			clock-frequency = <25000000>;
+			status = "disabled";
+		};
+	};
+};